1. Field of the Invention
The present invention generally relates to a reference voltage generating circuit and, more particularly, to a reference voltage generating circuit used for an electronic circuit provided in a portable electronic device such as a personal digital assistant (PDA) device, portable telephone including a personal digital cellular phone (ODC) and a personal handyphone system (PHS) or a portable audio device such as a mini disk (MD) player.
The reference voltage generating circuit is also used in a circuit for detecting an excessive charge or discharge current which circuit is provided in an integrated circuit (IC) for protecting a lithium ion battery from being excessively charged or discharged.
2. Description of the Related Art
Japanese laid-Open Patent Application No.1-217611 discloses a reference voltage generating circuit formed in a semiconductor device. FIG. 1 shows the reference voltage generating circuit disclosed in this patent document. In the reference voltage generating circuit shown in FIG. 1, a plurality of MOS transistors 3A to 14A are connected in series, and the MOS transistor 3A is connected to a direct current power source 1A via a resistor 2A having a high resistance. The reference voltage generating circuit further comprising a plurality of switching elements 15A to 19A connected to the MOS transistors 3A to 7A, respectively so that a constant voltage is obtained by a voltage drop generated across the MOS transistors 15A to 19A.
Additionally, Japanese Laid-Open Patent Application No.6-230836 discloses a reference voltage generating circuit formed in a semiconductor device. FIG. 2 shows the reference voltage generating circuit disclosed in this patent document. The reference voltage generating circuit shown in FIG. 2 comprises a current source 1B connected to a voltage source Vcc, a second transistor 2B, a third transistor 3B, a first resistive element 4B and a second resistive element 5B. A collector and a base of the first transistor 2B are connected to the current source 1B. A collector of the second transistor 3B is connected to an emitter of the first transistor 2B. The first resistive element 4B is connected between the base of the first transistor 2B and a base of the second transistor 3B. The second resistive element 5B is connected between the base of the second transistor 3B and an emitter of the second transistor 3B. In this arrangement, a reference voltage V0 is output from a juncture between an emitter of the first transistor 2B and a collector of the second transistor 3B. The reference voltage V0 is adjusted to cancel a fluctuation due to a change in temperature by appropriately setting a resistance of each of the first and second resistive elements 4B and 5B.
However, in the above mentioned conventional reference voltage generating circuits, there is a problem in that a temperature characteristic of the reference voltage is not uniform due to dispersion in an amount of ion implantation to form a gate of each of the transistors. Such a problem is particularly considerable when the reference voltage generating circuit is used with a low-voltage source since a threshold voltage of each of the transistors must be small which results in high sensitivity to temperature. Additionally, the dispersion in the production process of the transistors may reduce an yield rate of the reference voltage generating circuit.